Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of a charge storage node (e.g., a floating gate or charge trap), or other physical phenomena (e.g., phase change or polarization), determine the data state of each cell. Common uses for flash memory include personal computers, personal digital assistants (PDAs), digital cameras, digital, media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a logical column of memory cells is coupled in parallel with each memory cell coupled to a data line, such as those typically referred to as bit lines. In NAND flash architecture, a column of memory cells is coupled in series with only the first memory cell of the column coupled to a bit line.
As the performance and complexity of electronic systems increase, the requirement for additional memory in a system also increases. However, in order to continue to reduce the costs of the system, the parts count must be kept to a minimum. This can be accomplished by increasing the memory density of an integrated circuit by using such technologies as multilevel cells (MLC). For example, MLC NAND flash memory is a very cost effective non-volatile memory.
Multilevel cells can take advantage of the analog nature of a traditional flash cell by assigning a data value, e.g., a bit pattern, to a specific threshold voltage (Vt) range stored on the cell. This technology permits the storage of two or more bits of information per cell, depending on the quantity of voltage ranges assigned to the cell and the stability of the assigned voltage ranges during the lifetime operation of the memory cell.
For example, a cell may be assigned four different threshold voltage ranges of 200 mV for each range. Typically, a margin, e.g., a dead space, of 0.2V to 0.4V is between each range to keep the ranges from overlapping. For example, if the threshold voltage of the cell is within the first range, the cell may be assigned a data value having a logical 11 state and is typically considered the erased state of the cell. If the threshold voltage is within the second range, the cell may be assigned a data value having a logical 01 state. This may continue for as many ranges that are used for the cell provided these threshold voltage (Vt) ranges remain stable during the lifetime operation of the memory cell.
Since two or more data values may be assigned to each MLC, the width of each of the threshold voltage ranges for each data value can be very important. The width is related to many variables in the operation of a memory circuit. For example, a cell could be verified at one temperature and read at a different temperature. The circuitry that determines if the cell is erased or programmed to a Vt level within the correct Vt range has to make that determination. That circuitry has some of its characteristics influenced by temperature. A Vt range generally takes into account all of these types of differences to accommodate a shift in the perceived threshold voltage of a memory cell under different operating conditions. In order for the memory cell to operate effectively, the width of the Vt ranges corresponding to the various data values that can be assigned to the memory cell, plus a margin between each Vt range, should amount to the available range of threshold voltages of the memory cell.
Programming in a memory typically is accomplished using a plurality of programming pulses that increase in voltage as programming occurs, with each programming pulse followed by verification to determine whether cells that are being programmed have been programmed to their desired threshold voltages. This is because some cells program at different voltages than other cells. For cells that are not being programmed but are coupled to the same bit line as a cell being programmed, a set of inhibit pulses is applied to their word lines to, for example, reduce coupling effects and over-programming. The inhibit pulses traditionally increase in voltage as programming occurs as well.
In a memory in which the pattern of cells and lines in the memory is such that at low program voltages most of the memory cells on bit lines that are inhibited are adjacent to other memory cells on bit lines that are being programmed, typical errors are more associated with those regions of low program voltages rather than high program voltages as memory cells scale down. This is due in part to the disturb due to increasing Vchannel loss between the pattern where inhibited bit lines have adjacent bit lines connected to memory cells that are being programmed, and the pattern where inhibited bit lines have adjacent bit lines connected to memory cells that are also inhibited from programming.
For reasons such as those stated above, and for other reasons, such as those stated below, which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for, among other things, reducing disturbance.